Latch note

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Latches should be avoided.

Example: In this example source code, Y is assigned to in only one of the two branches of the if statement in an unclocked always block, whereas Z is assigned to in both branches.  By omitting the assignment to Y in both branches, memory is inferred, and a latch is synthesized. 



This Synopsys Design Compiler synthesis script will report a latch in the design.


In this example source code, by making an assignment to Y in both branches of the if statement in the unclocked always block, no memory is inferred, and no latch is synthesized.





For signals assigned to in an unclocked always block, it is necessary to assign to them in all branches of if and case statements to avoid unwanted latches.  For signals assigned to in a clocked always block, it is not necessary to assign to them in all branches of if and case statements.
This Synopsys Design Compiler synthesis script will report that there are no latches in the design.