Combinational loop example
A combinational loop is a unregistered feedback loop.
This source code has a combinational loop.
This Synopsys Design Compiler synthesis script checks the design
for combinational loops, reporting detection of a timing loop for the design.
To eliminate the combinational loop, we can add a rising-edge-triggered register,
as in this
source code.
This Synopsys Design Compiler synthesis script checks the design
for combinational loops, reporting no timing loops for the design.
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